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Dialogic D/41JCT-LS

4-Port PCI Voice Processing Board

Features and Benefits

  • Four independent voice processing ports in a single PCI slot for low- to medium-density enterprise CT applications
  • With approvals in North America, Europe, and Japan, the D/41JCT-LS board cost effectively expands an application's ability to serve several global markets (other international approvals pending)
  • CT Bus* connector increases the board's capacity to interoperate with other CT Bus/SCbus compatible boards
  • SCbus connectivity through a simple cable adapter enables applications to access additional resources such as text-to-speech (TTS) and automatic speech recognition (ASR)
  • Universal PCI edge-connector for compatibility with 3.3 volt and 5.0 volt bus signals, enables deployment in a wide variety of PCI chassis from popular manufacturers
  • Plug and Play* ready. Simplifies hardware installation by eliminating DIP switches and jumper settings and enabling software controlled configuration.
  • Configure multiple boards in a single chassis, PCI bus or mixed PCI/ISA bus, for easy and cost-effective system expansion up to 32 analog ports
  • Downloadable Spring Ware firmware signal and call processing firmware, provides field-proven performance based on over 3 million installed ports with access to future feature enhancements
  • DTMF (touch tone) detection provides reliable detection during voice playback - lets callers "type-ahead" through menus
  • A-law or µ-law voice coding at dynamically selectable data rates, 24 Kb/s to 64 Kb/s, selectable on a channel-by-channel basis for optimal tradeoff between disk storage and voice quality
  • International Caller ID capability via on-hook audio path. Supports Bellcore CLASS*, UK CLI, Japanese Caller ID, and other international protocols.
  • Patented outbound call progress analysis monitors outgoing call status quickly and accurately
  • C language application program interfaces (API) for Windows NT*, Windows 2000*, UNIX*, and Linux shorten the development cycle for faster time to market
  • Supports the PBX Expert32 tool, a software utility that simplifies switch integration
  • Optional onboard Global Dial Pulse Detection (Global DPD) feature enables callers with non-touch-tone phones to access applications without additional "pulse-to-tone conversion" equipment

Applications

The D/41JCT-LS board is a four-port analog converged communications voice processing board ideal for developers building enterprise unified messaging and interactive voice response (IVR) applications for the global market. The D/41JCT-LS provides four telephone line interface circuits for direct connection to analog loop start lines. A dual-processor architecture, comprising a digital signal processor (DSP) and a general-purpose microprocessor, handles all telephony signaling and performs DTMF (touch tone) and audio/voice signal processing tasks. The D/41JCT-LS board, a part of the Intel PCI board product family, conforms to the H.100 CT Bus standard. The open architecture enables developers to build converged communications solutions using products from multiple vendors. And since you can install multiple D/41JCT-LS boards in a single PC chassis, you can build systems scaling up to 32 ports.

Downloaded Spring Ware firmware algorithms, executed by the onboard DSP, provide variable voice coding at 24 and 32 Kb/s ADPCM, and 48 and 64 Kb/s µ-law or A-law PCM, as well as µ-law to A-law conversion. Sampling rates and coding methods are selectable on a channel-by-channel basis. Applications may dynamically switch sampling rate and coding method to optimize data storage or voice quality as the need arises. Additional coding algorithms such as GSM and G.726 are available for use in applications that support the Voice Profile for Internet Mail (VPIM) standard.

Spring Ware firmware also provides reliable DTMF detection, DTMF cut-through, and talk off/play off suppression over a wide variety of telephone line conditions.

Global Dial Pulse Detection (Global DPD) algorithm, available as a software option for the D/41JCT-LS board, lets you use the board in countries that have limited touchtone telephone service. The Global DPD product can be optimized on a country-by-country basis to provide superior dial pulse detection.

Configurations

Use the D/41JCT-LS board to build sophisticated CT systems to which capabilities such as speech recognition, facsimile, and text-to-speech (TTS) can be added. The D/41JCT-LS board shares a common hardware and firmware architecture with other CT Bus and SCbus based boards for maximum flexibility and scalability. Add features or grow the system while protecting your investment in hardware and application code. Applications can be easily ported to lower or higher line-density platforms with minimum modifications.

The D/41JCT-LS board installs in PCI-based PCs or servers (PCI bus or mixed PCI/ISA) and compatible computers (Intel® 80486, or Pentium® processor-based PC platforms). The D/41JCT-LS board provides for building integrated voice solutions scalable from four ports to 32 ports. The maximum number of lines that can be supported is dependent on the application, the amount of disk I/O required, and the host computer CPU and power supply.

The D/41JCT-LS board can operate within a mixed chassis containing PCI and ISA products. The forward-looking design of the D/41JCT-LS conforms to the new H.100 CT Bus to enable connection to next-generation CT Bus products. The D/41JCT-LS can also connect to existing SCbus products through the use of an optional CT Bus/SCbus adapter. The adapter provides both SCbus and H.100 physical connectors required to link the D/41JCT-LS to current SCbus products.

Mixed PCI/ISA Configuration Example

Software Support

The D/41JCT-LS board is currently supported by the System Software and Software Development Kit for Windows NT and Windows 2000, and the System Software and Software Development Kit for UNIX and Linux Systems. These packages contain a set of tools for developing complex multichannel applications.

Functional Description

The D/41JCT-LS board uses a dual-processor architecture that combines the signal processing capabilities of a DSP with the decision-making and data movement functionality of a general-purpose 80186 control microprocessor. This dual-processor approach offloads many low-level decision-making tasks from the host computer and thus enables easier development of more powerful applications. This architecture handles real-time events, manages data flow to the host PC for faster system response time, reduces host PC processing demands, processes DTMF and telephony signaling, and frees the DSP to perform signal processing on the incoming call.

Each of four analog loop start telephone line interfaces on the D/41JCT-LS board receives analog voice and telephony signaling information from the telephone network (see block diagram). Each telephone line interface uses reliable, solid-state hook switches (no mechanical contacts) and FCC-part 68 class B ring detection circuitry. This FCC-approved ring detector is less susceptible to spurious rings created by random voltage fluctuations on the network. Each interface also incorporates circuitry that protects against high-voltage spikes and adverse network conditions and lets applications go off-hook any time during ring cadence without damaging the board.

Inbound telephony signaling (ring detection, loop-current detection, and Caller ID information) is detected by the line interface and routed via a control bus to the control processor. The control processor responds to these signals, informs the application of telephony signaling status, and instructs the line interface to transmit outbound signaling (on-hook/off-hook) to the telephone network.

The audio voice signal from the network is bandpass filtered and conditioned by the line interface and then applied to a CODEC (COder/DECoder) circuit. The CODEC filters, samples, and digitizes the inbound analog audio signal and passes this signal to a Motorola 56303* DSP.

Based on Spring Ware firmware loaded in DSP SRAM, the DSP performs the following signal analysis and operations on this incoming data:

  • Automatic gain control to compensate for variations in the level of the incoming audio signal
  • Applies an ADPCM (Adaptive Differential Pulse Code Modulation) or PCM (Pulse Code Modulation) algorithm to compress the digitized voice and save disk storage space
  • Detects the presence of tones - DTMF, MF, or an application-defined single or dual tone
  • Silence detection to determine whether the line is quiet and the caller is not responding

For outbound data, the DSP performs the following operations:

  • Expands stored, compressed audio data for playback
  • Adjusts the volume and rate of speed of playback upon application or user request
  • Generates tones - DTMF, MF, or any application-defined general-purpose tone

The dual-processor combination also performs the following outbound dialing and call progress monitoring:

  • Transmits an off-hook signal to the telephone network
  • Dials out (makes an outbound call)
  • Monitors and reports results: line busy or congested; operator intercept; ring, no answer; or if the call is answered, whether answered by a person, an answering machine, a fax machine, or a modem

The D/41JCT-LS board also supports optional Global DPD software that recognizes dial pulse digits even in the most difficult telephony environments.

When recording speech, the DSP can use different digitizing rates from 24 to 64 Kb/s as selected by the application for the best speech quality and most efficient storage. The digitizing rate is selected on a channel-by-channel basis and can be changed each time a record or play function is initiated. The DSP processed speech is transmitted via the control processor to the host PC for disk storage. When replaying a stored file, the processor retrieves the voice information from the host PC and passes it to the DSP, which converts the file into digitized voice. The DSP sends digitized voice and appropriate signaling responses to the CODEC to be converted into analog format for transmission to the telephone network.

Signaling data (on-/off-hook, ringing, Caller ID, etc.) is passed to the onboard control processor and transmitted to the application via a dual-port shared RAM and the host PCI bus.

When using the D/41JCT-LS board and the CT Bus, digital voice and signaling information from a network board or other resource enter the board via the H.100 connector and CT Bus interface. A CT612 chip manages these signals and acts as the traffic coordinator and matrix switch to buffer the high-speed digital data from the bus until the data for each channel can be transmitted to the DSP.

The CT612 chip transmits several lower speed data streams over the CT Bus high-speed channel. The bus configuration is set when the firmware is downloaded at system initialization. This chip incorporates matrix switching capabilities. Under control of the onboard control processor, the CT612 chip can connect any call being processed to any of the four analog lines or to any of the 4096 CT Bus time slots. This enables the application to switch calls to or from other resources, such as facsimile or speech recognition, as they are needed, or to reroute calls.

The onboard control processor controls all operations of the D/41JCT-LS board via a local bus and interprets and executes commands from the host PC. The processor handles real-time events, manages data flow to the host PC to provide faster system response time, reduces PC host processing demands, processes DTMF and telephony signaling before passing them to the application, and frees the DSP to perform signal processing.

Communications between a processor and the host PC is via the Shared RAM that acts as an input/output buffer and thus increases the efficiency of disk file transfers. This RAM interfaces to the host PC via the PCI bus. All operations are interrupt-driven to meet the demands of real-time systems. When the system is initialized, Spring Ware firmware is downloaded from the host PC to the onboard code/data RAM and DSP RAM to control all board operations. This downloadable firmware gives the board all of its intelligence and enables easy feature enhancement and upgrades.

With the rotary switch on the D/41JCT-LS board set to 0, the D/41JCT-LS board is Plug and Play enabled. Configuration is handled exclusively by software. Alternatively, you can set the rotary switch to another value to manually control board location for ease of cabling or backwards compatibility with Dialogic Board Locator Technology (BLT) installation.

Technical Specifications**
Number of ports4
Maximum boards/system8
Analog network interfaceOnboard loop start interface circuits
Resource sharing busCT Bus, SCbus compatible with bus adapter
Control microprocessor80C186 @ 34.8 MHz
Digital signal processorMotorola DSP56303 @100 MHz, with 128Kx24 private SRAM
HOST INTERFACE:
Bus compatibilityPCI. Complies with PCISIG Bus Specification, Rev. 2.1.
Bus speed33 MHz max.
Bus modeTarget mode operation only
Shared memory32 KB page
I/O portsNone
TELEPHONE INTERFACE‡:
Trunk typeLoop start
Loop current range20 to 120 mA
Impedance600 Ohms nominal
Ring detection15 Vrms min., 13 to 68 Hz (configurable by parameter)
Echo return lossConfigurable by software parameter
Crosstalk couplingLess than -70 dB at 1 KHz channel to channel
Receive signal/noise ratio70 dB referenced to -15 dBm
Frequency response200 Hz to 3400 Hz ±3 dB (transmit and receive)
ConnectorFour RJ-11 type
POWER REQUIREMENTS:
+5 VDC750 mA max.
+12 VDC200 mA max.
-12 VDC100 mA max.
Operating temperature0° C to +50° C
Storage temperature-20° C to +70° C
Humidity8% to 80% non-condensing
Form factorUniversal slot (5 V or 3.3 V) PCI long card, 12.3 in. long (without edge retainer) or 13.3 in. long (with edge retainer), 0.79 in. wide (total envelope), 3.87 in. high (excluding edge connector)
SAFETY & EMI CERTIFICATIONS:
United StatesFCC Part 15 class A; FCC Part 68 EBZUSA-75385-VM-T UL: E96804 UL1950
CanadaDOC: 885-5542A DOC: 885-5542A For specific country approval designation, see the product approvals list or contact your Technical Sales Representative
Warranty3 years standard
Spring Ware Firmware Technical Specifications**
AUDIO SIGNAL:
Receive range-50 to -13 dBm (nominal), for average speech signals1 configurable by parameter‡
Automatic gain controlApplication can enable/disable. Above -18 dBm results in full-scale recording, configurable by parameter‡.
Silence detection-38 dBm nominal, software adjustable‡
Transmit level (weighted average)-9 dBm nominal, configurable by parameter‡
Transmit volume control40 dB adjustment range, with application definable increments
Frequency response 
24 Kb/s300 Hz to 2600 Hz ±3 dB
32 Kb/s300 Hz to 3400 Hz ±3 dB
48 Kb/s300 Hz to 2600 Hz ±3 dB
64 Kb/s300 Hz to 3400 Hz ±3 dB
AUDIO DIGITIZING:
24 Kb/sADPCM @ 6 kHz sampling
32 Kb/sADPCM @ 8 kHz sampling
48 Kb/sµ-law PCM @ 6 kHz sampling
64 Kb/sµ-law PCM @ 8 kHz sampling
Digitization selectionSelectable by application on function call-by-call basis
Playback speed controlPitch controlled; available for 24 and 32 Kb/s ADPCM data rates; adjustment range: ±50%; adjustable through application or programmable DTMF control
DTMF TONE DETECTION:
DTMF digits0 to 9, *, #, A, B, C, D per Bellcore LSSGR Sec 6
Dynamic range-45 dBm to +3 dBm per tone, configurable by parameter‡
Minimum tone duration40 ms, can be increased with software configuration
Interdigit timingDetects like digits with a 40 ms interdigit delay.
Detects different digits with a 0 ms interdigit delay.
Twist and frequency variationMeets Bellcore LSSGR Sec 6 and EIA 464 requirements
Acceptable twist10 dB
Signal/noise ratio10 dB (referenced to lowest amplitude tone)
Noise toleranceMeets Bellcore LSSGR Sec 6 and EIA 464 requirements for Gaussian, impulse, and power line noise tolerance
Cut throughDetects down to -36 dBm per tone into 600 Ohm load impedance
Talk offDetects less than 20 digits while monitoring Bellcore TR-TSY-000763 standard speech tapes (LSSGR requirements specify detecting no more than 470 total digits). Detects 0 digits while monitoring MITEL speech tape #CM 7291.
GLOBAL TONE DETECTION:
Tone typeProgrammable for single or dual
Maximum number of tonesApplication dependent
Frequency rangeProgrammable within 300 to 3500 Hz
Maximum frequency durationProgrammable in 5 Hz increments.
Frequency resolutionLess than 5 Hz.-Note: Certain limitations exist for dual tones closer than 60 Hz apart.
TimingProgrammable cadence qualifier, in 10 ms increments
Dynamic rangeProgrammable, default set at -36 dBm to +3 dBm per tone
GLOBAL TONE GENERATION:
Tone typeGenerate single or dual tones
Frequency rangeProgrammable within 200 to 4000 Hz
Frequency resolution1 Hz
Duration10 msec increments
Amplitude-43 dBm to -3 dBm per tone, programmable
MF SIGNALING:
MF digits0 to 9, KP, ST, ST1, ST2, ST3 per Bellcore LSSGR Sec 6, TR-NWT-000506 and CCITT Q.321
Transmit levelComplies with Bellcore LSSGR Sec 6, TR-NWT-000506
Signaling mechanismComplies with Bellcore LSSGR Sec 6, TR-NWT-000506
Dynamic range for detection-25 dBm to +3 dBm per tone
Acceptable twist6 dB
Acceptable frequency variationLess than ±1 Hz
CALL PROGRESS ANALYSIS:
Busy tone detectionDefault setting designed to detect 74 out of 76 unique busy/congestion tones used in 97 countries as specified by CCITT Rec E., Suppl #2. Default utilizes both frequency and cadence detection. Application can select frequency only for faster detection in specific environments.
Ring back detectionDefault setting designed to detect 83 out of 87 unique ring back tones used in 96 countries as specified by CCITT Rec E., Suppl #2. Utilizes both frequency and cadence detection.
Positive Voice Detection accuracy>98% based on tests on a database of real world calls
Positive voice detection speedDetects voice in as little as 1/10th of a second.
Positive Answering Machine Detection accuracy>80% to 90% based on application and environment
Fax/modem detectionPreprogrammed
Intercept detectionDetects entire sequence of the North American tri-tone. Other SIT sequences can be programmed.
Dial tone detectionbefore dialing Application enable/disable; supports up to three different user definable dial tones; programmable dial tone drop out debouncing.
TONE DIALING:
MF digits0 to 9, *, #, A, B, C, D; 16 digits per Bellcore LSSGR Sec 6, TR-NWT-000506
Pulsing rate0 to 9, KP, ST, ST1, ST2, ST3
Frequency variationLess than ±1 Hz
Rate10 digits/s max.,configurable by parameter‡
Level-4.0 dBm per tone, nominal, configurable by parameter‡
PULSE DIALING:
10 digits0 to 9
Pulsing rate10 pulses/s, nominal, configurable by parameter‡
Break ratio60% nominal, configurable by parameter‡
ANALOG DISPLAY SERVICES INTERFACE (ADSI):
 FSK generation per Bellcore TR-NWT-000030
 CAS tone generation and DTMF detection per Bellcore TR-NWT-001273.

Hardware System Requirements

  • 80486 or Pentium® processor-based, PCI bus or mixed PCI/ISA bus PC or compatible computer
  • Operating system hardware requirements vary according to the number of channels being used
  • System must comply with PCISIG Bus Specification Rev. 2.1 or later

Additional Components

  • Optional multidrop CT Bus cable
  • Optional CT Bus/SCbus adapter

*All company names, products, and services mentioned are the trademarks or registered trademarks of their respective owners.

** All specifications are subject to change without notice

Analog levels: 0 dBm0 corresponds to a level of +3 dBm at tip-ring analog point. Values vary depending on country requirements; contact your Dialogic Technical Sales Representative.

1 Average speech mandates +16 dB peaks above average and preserves -13 dB valleys below average.


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