Dialogic SingleSpan-JCT Series
24- and 30-Port Voice Processing with Digital Network Interface
Downloadable Datasheet (81.2KB)
Features and Benefits
- High channel-per-slot
density: one T-1 ISDN PRI trunk with 24 channels of
voice processing or one E-1 ISDN PRI trunk with 30
channels of voice processing
- Supports CSP1:
a flexible speech processing technology, coupled with
efficient drivers, off-loads critical real-time signal
processing in speech-enabled applications to onboard
DSPs. Reduces system latency, increases recognition
accuracy, and improves overall system response time
for high-density speech solutions.
- Supports DSP-based onboard
fax and host-based speech recognition to maximize
the number of boards in the system
- Supports G.726 bit exact
and GSM coders, letting developers implement unified
messaging applications that meet VPIM standards
- Offered in industry-standard
32-bit PCI form factor with universal connector
- Silence-compressed recording
eliminates silence and preserves hard disk space
- H.100 connector lets
developers take advantage of the industry-standard
CT Bus and increases the board's capacity to interoperate
with other CT Bus compatible boards
- SpringWare downloadable
signal and call processing firmware provides easy
feature enhancement and field-proven performance based
on over four million installed ports
- PerfectDigit DTMF (touchtone)
provides reliable detection during voice playback
- lets callers "type-ahead" through menus
- Support under GlobalCall
software lets the same application work on multiple
signaling systems worldwide (e.g., ISDN, T-1 robbed-bit,
R2/MF, pulsed, MF Socotel)
- Intel® Dialogic®
CT MediaTM server software support facilitates
multi-application development
- Supports the BoardWatch
tool, the SNMP-compatible software for remote CT board
management
- Enables system integrators
and developers to lower costs by incorporating more
ports per chassis, using less expensive desktop-style
machines, and easing configuration/installation effort
- SDKs for Windows NT*,
Windows* 2000, and Linux* yield faster time to market
Applications
- Voice-enabled e-Commerce or voice portal solutions
- Unified messaging
- Follow-me/one-number service
- Voice messaging
- Speech-enabled interactive media voice response
- Web-enabled call center or contact center
The Intel® Dialogic® brand D/240JCT-T1 and
D/300JCT-E1boards are the next generation of SpringWare-based
SingleSpan products. They are ideal for developers seeking
to provide cost-effective, highly scalable, high-density
communications applications requiring multimedia resources
such as voice, software-based speech recognition, fax,
and digital network interface in a single personal computer
(PC) slot. These boards offer a rich set of advanced
features and support digital signal processing (DSP)
technology and industry-standard PCI bus and CT Bus
technologies.
Support for the innovative continuous speech processing
(CSP) technology enables seamless integration of software-based
speech recognition software from leading speech technology
vendors. Onboard DSP-based fax and support for software-based
speech recognition lets developers maximize the number of
boards in the system for multimedia communications applications
such as Web-enabled call centers, voice portals, unified messaging,
or speech-enabled interactive voice response (IVR). The option
to use new voice coders such as GSM and G.726 (the de facto
standards when complying with Voice Profile for Internet Messaging
[VPIM] standards) provides the capability to build unified
messaging solutions while working with existing legacy messaging
systems. In addition, support under GlobalCall and CT MediaTM
software facilitates global deployment and adds the flexibility
to scale systems to meet the growing needs of your business.
1 On D/240JCT-T1 robbed-bit systems only. Please
refer to the CSP datasheet for more information on CSP.
2 Fax and host-based speech recognition are mutually
exclusive.
Configurations
Use SingleSpan-JCT boards to develop sophisticated,
multimedia communications systems incorporating capabilities
such as voice processing, facsimile, text-to-speech
(TTS), and automatic speech recognition (ASR). These
boards share a common hardware and software architecture
with other Dialogic SCbus and CT Bus boards for maximum
flexibility and scalability. You can add features and
grow the system while protecting your investment in
hardware and application code. Applications can be ported
easily to lower or higher density platforms, with only
minimum modifications.
SingleSpan-JCT boards install in any PCI-based PC or server
(PCI bus or mixed PCI/ISA bus) and compatible computers (Intel386TM,
Intel486TM, or Pentium® processors or Sun UltraSPARC*).
Each board occupies a single expansion slot and up to 16 boards
can be configured in a system. The number of boards and channels
supported varies depending on the application, the operating
system, the amount of disk I/O required, the number of CT
Bus loads per board, and the host computer's CPU(s) and power
supply.
SingleSpan-JCT boards can operate in either terminate
or drop-and-insert configurations. In a terminate configuration,
the board handles the call processing of the digital
audio and telephony signaling, facsimile, and the software-based
speech recognition. If additional resources are required,
such as TTS, these resources can be switched to the
call via the CT Bus/SCbus. A D/240JCT-T1 or D/300JCT-E1
board installed as a terminating device eliminates the
need for a channel bank. The system operates as a standalone
call processing node.
In a drop-and-insert configuration, use SingleSpan-JCT
boards and a DTI board connected via the CT Bus/SCbus
to pass T-1 or E-1 time slots through to each other.
This configuration joins two separate T-1 or E-1 lines,
or it can be placed in-line between a T-1 or E-1 line
and a switch (a PBX, for example). Calls on individual
channels can either terminate at a call processing resource
on a SingleSpan-JCT series board, or "flow through"
transparently to the DTI board.
ISDN-PRI Support
The Dialogic ISDN Primary Rate Interface (PRI) firmware
is a standard feature of the SingleSpan-JCT Series.
The Dialogic PRI firmware is approved for use with many
popular protocols in major markets, based on both T-1
(1.544 Mb/s) and E-1 (2.048 Mb/s) physical interfaces.
Features and benefits of ISDN PRI include:
- ISDN PRI connectivity to computer telephony (CT)
systems
- Dialed Number Identification Service (DNIS) lets
the application route incoming calls by automatically
identifying the number the caller dialed
- Automatic Number Identification (ANI) lets the application
identify the calling party
- ANI-on-Demand feature saves money by selectively
requesting ANI information only when needed
- ISDN offers inherent benefits to call center applications
with its fast call setup and fast retrieval of DNIS
and ANI information on inbound calls
- Call-By-Call Service Selection lets an application
select the most efficient bearer channel service on
a call-by-call basis
- Subaddressing allows direct connection to individual
extensions or devices sharing the same phone number,
or as a proprietary messaging mechanism
- Powerful and universal software interface simplifies
access for developers who are unfamiliar with ISDN,
yet enables sophisticated control of features
- Multinational approvals with many popular protocols
- User-to-User Information lets an application send
proprietary messages to remote systems during call
establishment
- Facility, Notify, and optional Information Elements
(IEs) let applications work with network-specific
supplementary services
- Layer 2 access empowers developers to build customized
Layer 3 protocol
- Ability to dynamically set protocol timers through
host application programming interfaces (APIs)
- Programmable Startup Cause Value presentation to
the network lets the user reject an incoming call
with a preassigned cause value if the host has not
yet done a waitcall on that channel
- Maskable Layer 2 Control lets the application toggle
between bringing Layer 2 up and down as desired
- Support for SERVICE, SERVICE_ACK, and STATUS ENQUIRY
messages
Software Support
SingleSpan-JCT boards are supported by the System
Software and Software Development Kits (SDKs) for Windows
NT*, Windows* 2000, and Linux*. These packages contain
a set of tools for developing sophisticated, multimedia
communications applications.
SingleSpan-JCT boards can use GlobalCall software,
a call control interface that simplifies the development
and use of compelled R2 and other special signaling
protocols. In addition, SingleSpan-JCT boards support
CT Media server software which facilitates multi-application
development. These boards also support the BoardWatch
tool, the SNMP-compatible software for remote CT board
management. BoardWatch software simplifies the management
of CT devices and lowers the total cost of operation.
Centralized management capabilities provide a single
point of configuration and inventory for all network
devices. Fault management for high availability systems
includes diagnostics, detection, and recovery capabilities.
Functional Description
D/240JCT-T1
The D/240JCT-T1 board connects directly to a channel
service unit (CSU), digital service unit (DSU), or to
other network terminating equipment. The CSU chosen
must support the D4 or ESF (within ISDN) superframe
format. Most functions traditionally performed by a
DSU (such as unipolar to bipolar format conversion,
framing, etc.) are performed by the D/240JCT-T1 board.
(The only exception is the ability to interpret certain
bipolar violation patterns such as loopback start and
stop commands from the T-1 network.)
The board processes the digital on-hook/off-hook signaling
information and digital voice signals from the telephone
network. Digital T-1 signals enter the board via a T1XC
line interface (see block diagram). The line interface
contains a software-switchable clock that can be set
to any of the following settings:
- Loop (clocking is slaved to the external network)
- Independent (clocking is derived from an onboard
oscillator)
- Expansion (clocking is slaved to another bus clock
master board)
The incoming T-1 bit stream is applied to a CT612 chip,
which acts as a traffic coordinator for each channel
and as an interface to the CT Bus. This serial bit stream
contains the digitized voice data and the signaling
information for the incoming call.
Each of two CT612 functional modules on the D/240JCT-T1
board transmits several lower-speed data streams over
a single high-speed channel. The bus configuration is
set when the firmware is downloaded at system initialization.
These chips incorporate matrix switching capabilities.
Under control of an onboard control processor, a CT612
functional module can connect a call being processed
or an available external resource to any of the 1024
CT Bus time slots. This lets the application route calls
to any added resources such as fax, TTS, or ASR.
A DSP resource receives digital voice data via a CT612
module. The DSP processes the data based on Spring Ware
firmware loaded in its high-speed RAM. Each DSP performs
the following signal analysis and operations on this
incoming data:
- applies AGC to compensate for variations in the
level of the incoming audio signal
- applies an ADPCM, PCM, GSM, or G.726 algorithm to
compress the digitized voice and save disk storage
space
- detects the presence of tones - DTMF, MF, or an
application-defined, single- or dual-frequency tone
- detects silence to determine whether the line is
quiet and the caller is not responding
For outbound data, the DSP performs the following operations:
- expands stored, compressed audio data for playback
- adjusts the volume and rate of speed of playback
upon application or user request
- generates tones - DTMF, MF, or any application-defined,
general-purpose tone
The dual processor combination also performs the following
outbound dialing and call progress monitoring functions:
- transmits an off-hook signal to the telephone network
- dials out (makes an outbound call)
- monitors and reports call progress results: line
busy or congested; operator intercept; ring, no answer;
or if the call is answered, whether answered by a
person, an answering machine, a facsimile machine,
or a modem
The board's line interface extracts or inserts telephony
signaling information, which is processed by an onboard
control processor. The DSPs only process the digitized
voice data.
When recording speech, the DSP can use digitizing rates
from 13 to 64 Kb/s as selected by the application for
the best speech quality and most efficient storage.
The digitizing rate is selected on a channel-by-channel
basis and can be changed each time a record or play
function is initiated. The DSP-processed speech is transmitted
by the control processor to the host PC for disk storage.
When replaying a stored file, the processor retrieves
the voice information from the host PC and passes it
to the DSP, which converts the file into digitized voice.
The DSP uses the CT Bus circuitry to send the digitized
voice responses to the caller via the T1XC line interface.
For CT Bus/SCbus configurations, the internal local
buses operate at 2.048 Mb/s. A High-Level Data Link
Controller (HDLC) formats ISDN data. The HDLC receives
ISDN signaling data from the T1XC interface and CT612
ASIC and makes it available to the control processor.
It also formats and sends outbound signaling data from
the control processor to the network interface through
the CT612 ASIC and T1XC transceiver chip.
The onboard control processor(s) controls all operations
of the board via local buses and interprets and executes
commands from the host PC. These processors:
- handle real-time events
- manage data flow to the host PC to provide faster
system response time
- reduce PC host processing demands
- process DTMF and telephony signaling before passing
them to the application
- free the DSPs to perform signal processing
Communications between a processor and the host PC
is via the shared RAM, which acts as an input/output
buffer, increasing the efficiency of disk file transfers.
This RAM interfaces to the host PC via the PCI bus.
All operations are interrupt-driven to meet the demands
of real-time systems. When the system is initialized,
SpringWare firmware is downloaded from the host PC to
the onboard code/data RAM and DSP RAM to control all
board operations. This firmware gives the board all
of its intelligence and enables easy feature enhancement
and upgrades.
The Traffic Controller ASIC is the Intel486 control
processor interface that handles all peripheral devices
(CT612, HDLC, DSPs, E1XC) and host PC functions (Board
Locator Technology, programmable interrrupts, and shared
RAM). The Board Locator Technology circuit inside the
Traffic Controller ASIC operates in conjunction with
a rotary switch, eliminating the need to set confusing
jumpers or DIP switches.
D/300JCT-E1
The D/300JCT-E1 board processes the digital on-hook/off-hook
signaling information and digital voice signals from
the telephone network. Digital E-1 signals enter the
board via an E1XC line interface (see block diagram).
The line interface supports CRC4 error detection (Cyclic
Redundancy Check) and contains a software-switchable
clock that can be set to any of the following settings:
- Loop (clocking is slaved to the external network)
- Independent (clocking is derived from an onboard
oscillator)
- Expansion (clocking is slaved to another bus clock
master board)
Each of two CT612 functional modules on the D/300JCT-E1
board transmits several lower-speed data streams over
a single high-speed channel. The bus configuration is
set when the firmware is downloaded at system initialization.
These chips incorporate matrix switching capabilities.
Under control of an onboard control processor, a CT612
functional module can connect a call being processed
or an available external resource to any of the 1024
CT Bus time slots. This lets the application route calls
to any added resources such as fax, TTS, or ASR.
A DSP resource receives digital voice data via a CT612
module. The DSP processes the data based on Spring Ware
firmware loaded in its high-speed RAM. Each DSP performs
the following signal analysis and operations on this
incoming data:
- applies automatic gain control to compensate for
variations in the level of the incoming audio signal
- applies an ADPCM, PCM, GSM, or G.726 algorithm to
compress the digitized voice and save disk storage
space
- detects the presence of tones - DTMF, R2MF, or an
application-defined, single- or dual-frequency tone
- detects silence to determine whether the line is
quiet and the caller is not responding
For outbound data, the DSP performs the following operations:
- expands stored, compressed audio data for playback
- adjusts the volume and rate of speed of playback
upon application or user request
- generates tones - DTMF, R2MF, or any application-defined,
general-purpose tone
The dual processor combination also performs the following
outbound dialing and call progress monitoring functions:
- transmits an off-hook signal to the telephone network
- dials out (makes an outbound call)
- monitors and reports call progress results: line
busy or congested; operator intercept; ring, no answer;
or if the call is answered, whether answered by a
person, an answering machine, a facsimile machine,
or a modem
The board's line interface extracts or inserts telephony
signaling information, which is processed by an onboard
control processor. The DSPs only process the digitized
voice data.
When recording speech, the DSP can use digitizing rates
from 24 to 64 Kb/s as selected by the application for
the best speech quality and most efficient storage.
The digitizing rate is selected on a channel-by-channel
basis and can be changed each time a record or play
function is initiated. The DSP-processed speech is transmitted
by the control processor to the host PC for disk storage.
When replaying a stored file, the processor retrieves
the voice information from the host PC and passes it
to the DSP, which converts the file into digitized voice.
The DSP sends the digitized voice responses to the caller
via the CT612 functional modules, the CT Bus, and the
E1XC line interface.
For CT Bus/SCbus configurations, the internal local
buses operate at 2.048 Mb/s. A High-Level Data Link
Controller (HDLC) formats ISDN data. The HDLC receives
ISDN signaling data from the E1XC interface and the
CT612 and makes it available to the control processor.
It also formats and sends outbound signaling data from
the control processor to the network interface through
the CT612 ASIC and E1XC transceiver chip.
The onboard control processor(s) controls all operations
of the board via local buses and interprets and executes
commands from the host PC. These processors:
- handle real-time events
- manage data flow to the host PC to provide faster
system response time
- reduce PC host processing demands
- process DTMF and telephony signaling before passing
them to the application
- free the DSPs to perform signal processing
Communications between a processor and the host PC
is via the shared RAM, which acts as an input/output
buffer, increasing the efficiency of disk file transfers.
This RAM interfaces to the host PC via the PCI bus.
All operations are interrupt-driven to meet the demands
of real-time systems. When the system is initialized,
Spring Ware firmware is downloaded from the host PC
to the onboard code/data RAM and DSP RAM to control
all board operations. This firmware gives the board
all of its intelligence and enables easy feature enhancement
and upgrades.
The Traffic Controller ASIC is the 80486 control processor
interface that handles all peripheral devices (CT612,
HDLC, DSPs, E1XC) and host PC functions (Board Locator
Technology, programmable interrupts, and shared RAM).
The Board Locator Technology circuit inside the Traffic
Controller ASIC operates in conjunction with a rotary
switch, eliminating the need to set confusing jumpers
or DIP switches.
Technical Specifications**
D/240JCT-T1
| Number
of ports |
24 |
| Max.
boards/system |
10 (UNIX*,
Windows NT*). Number may be limited by application,
system performance, and number of CT Bus loads per
board. |
| CT Bus
loads per board |
2 |
| Maximum
CT Bus loads per system |
20 (see
the CT Bus specification for further details) |
| Digital
network interface |
Onboard
DSX-1 interface |
| Resource
sharing bus |
H.100
CT Bus |
| Control
microprocessor |
Two Intel®
80486 GX @ 32.7 MHz, 0 wait state |
| Digital
signal processors |
Three
Motorola* DSP56303 @ 100 MHz, each with 256 K word
private, 2 wait state SRAM |
| HOST
INTERFACE: |
| Bus
compatibility |
PCI.
Complies with PCISIG Bus Specification, Rev. 2.2. |
| Bus
speed |
33 MHz
max. |
| Bus
mode |
32- to
16-bit conversion in target mode |
| Shared
memory |
2 x 64
KB page |
| I/O
ports |
None |
| TELEPHONE
INTERFACE: |
| Clock
rate |
1.544
Mb/s ±32 ppm |
| Level |
3.0 V
(nominal) |
| Pulse
width |
323.85
ns (nominal) |
| Line
impedance |
100 Ohm
±10% |
| Other
electrical characteristics |
Complies
with AT&T TR62411 and ANSI T1.403-1989 |
| Framing |
SF (D3/D4),
ESF for ISDN |
| Line
coding |
AMI,
AMI with B7 stuffing, B8ZS |
| Clock
and data recovery |
Complies
with AT&T TR62411* and Bellcore TA-TSY-000170* |
| Jitter
tolerance |
Complies
with AT&T TR62411* and ANSI T1.403-1989* |
| Connectors |
RJ-48C |
| Telephony
bus connector |
H.100-style,
68-pin, fine-pitch card edge connector |
| Loopback |
Supports
switch-selectable local analog loopback and software
selectable local digital loopback |
| POWER
REQUIREMENTS: |
| +5 VDC |
2.0 A
typical; 2.2 A max. |
| +12
VDC |
6 mA
typical; 6.6 mA max. |
| -12
VDC |
Not required |
| Operating
temperature |
0°C to
+50°C |
| Storage
temperature |
-20°C
to +70°C |
| Humidity |
8% to
80% noncondensing |
| Form
factor |
PCI long
card, 12.3 in. long (without edge retainer) or 13.3
in. long (with edge retainer), 0.79 in. wide (total
envelope), 3.87 in. high (excluding edge connector) |
| SAFETY
AND EMI CERTIFICATIONS: |
| United
States |
FCC part
68 ID#: EBZUSA-20078-XD-NUL: 1950 (E96804) |
| Canada |
IC: 885
5959 ACSA: 950 (LR 84340) |
| Estimated
MTBF |
150,000
hours per Bellcore Method I |
| Warranty |
3 years
standard |
D/300JCT-E1
| Number of ports |
30 |
| Max. boards/system |
10 (UNIX, Windows NT). Number may be limited by application, system performance, and number of CT Bus loads per board. |
| CT Bus loads per board |
2 |
| Maximum CT Bus loads per system |
20 (see the CT Bus specification for further details) |
| Digital network interface |
Onboard E-1 interface |
| Resource sharing bus |
H.100 CT Bus |
| Control microprocessor |
Two Intel® 80486 GX @ 32.7 MHz, 0 wait state |
| Digital signal processors |
Four Motorola DSP56303 @ 100 MHz, each with 256 K word private, 2 wait state SRAM |
| HOST INTERFACE: |
| Bus compatibility |
PCI. Complies with PCISIG Bus Specification, Rev. 2.2. |
| Bus speed |
33 MHz max. |
| Bus mode |
32- to 16-bit conversion in target mode |
| Shared memory |
2 x 64 KB page |
| I/O ports |
None |
| TELEPHONE INTERFACE: |
| Network clock rate |
2.048 Mb/s ±50 ppm |
| Internal clock rate |
2.048 Mb/s ±32 ppm |
| Level |
2.37 V (nominal) for 75 Ohm or 3.0 V (nominal) for 120 Ohm lines |
| Pulse width |
244 ns (nominal) |
| Line impedance |
75 Ohm, unbalanced or 120 Ohm, balanced |
| Other electrical characteristics |
Complies with CCITT Rec. G.703 |
| Framing |
CCITT G.704-1988 with CRC4 |
| Line coding |
HDB3 |
| Clock and data recovery |
Complies with CCITT Rec. G.823-1988 |
| Jitter tolerance |
Complies with CCITT Rec. G.823, G.737, G.739, G.742-1988 |
| Connectors |
BNC for 75 Ohm or RJ-48C for 120 Ohm lines |
| Telephony bus connector |
H.100-style, 68-pin, fine-pitch card edge connector |
| Loopback |
Supports switch-selectable local analog loopback and software selectable local digital loopback |
| POWER REQUIREMENTS: |
| +5 VDC |
2.0 A typical; 2.2 A max. |
| +12 VDC |
6 mA typical; 6.6 mA max. |
| -12 VDC |
Not required |
| Operating temperature |
0°C to +50°C |
| Storage temperature |
-20°C to +70°C |
| Humidity |
8% to 80% noncondensing |
| Form factor |
PCI long card, 12.3 in. long (without edge retainer) or 13.3 in. long (with edge retainer), 0.79 in. wide (total envelope), 3.87 in. high (excluding edge connector) |
| SAFETY AND EMI CERTIFICATIONS: |
| United States |
FCC part 68 ID#: EBZUSA-20078-XD-NUL: 1950 (E96804) |
| Canada |
IC: 885 5959 ACSA: 950 (LR 84340) |
| Estimated MTBF |
150,000 hours per Bellcore Method I |
| Warranty |
3 years standard |
SpringWare Technical Specifications**
FACSIMILE:
| Fax
compatibility |
ITU-T G3 compliant
(T.4, T.30), ETSI NET/30 and T.6 compliant |
| Data rate |
14,400 b/s
(v.17) send, 9,600 b/s receive |
| Variable speed
selection |
Automatic step-down
to 12,000 b/s, 9600 b/s, 7200 b/s, 4800 b/s, and lower |
| Transmit data
modes |
MH (Modified
Huffman), MR (Modified Read) |
| Receive data
modes |
MH, MR |
| File data
formats |
TIFF/F (Tagged
Image File Format) for transmit/receive MH, MR, and MMR
(Modified Modified Read) |
| ASCII-to-fax
conversion |
Host-PC-based
conversionDirect transmission of text filesAll Windows
fonts supportedPage headers generated automatically |
| Error correction |
Detection,
reporting, and correction of faulty scan lines |
| Image widths |
215 mm (8.5
in), 255 mm (10.0 in), and 303 mm (11.9 in) |
| Image scaling |
Automatic horizontal
and vertical scaling between page sizes |
| Polling modes |
Normal and
turnaround |
| Image resolution |
Normal (203
pels/in x 98 lines/inch)Fine (203 pels/in x 196 lines/inch)
|
| Fill minimization |
Automatic fill
bit insertion and stripping |
| AUDIO
SIGNAL: |
| Receive range |
(T-1) -40 to
+2.5 dBm0 nominal, configurable by parameter†(E-1)
-43 to +2.5 dBm0 nominal, configurable by parameter† |
| Automatic
gain control |
Application
can enable/disable. Above -18 dBm0 (T-1) or -21 dBm0 (E-1)
results in full-scale recording, configurable by parameter.† |
| Silence detection |
-38 dBm0 nominal,
software adjustable† |
| Transmit level
(weighted average) |
(T-1) -9 dBm0
nominal, configurable by parameter†(E-1) -12.5
dBm0 nominal, configurable by parameter† |
| Transmit volume
control |
40 dB adjustment
range, with application-definable increments and legal
limit cap |
| FREQUENCY
RESPONSE: |
| 24 Kb/s |
300 Hz to 2600
Hz ±3 dB |
| 32 Kb/s |
300 Hz to 3400
Hz ±3 dB |
| 48 Kb/s |
300 Hz to 2600
Hz ±3 dB |
| 64 Kb/s |
300 Hz to 3400
Hz ±3 dB |
| AUDIO
DIGITIZING: |
| 13 Kb/s |
GSM @ 8 kHz
sampling |
| 24 Kb/s |
OKI ADPCM @
6 kHz sampling |
| 32 Kb/s |
OKI ADPCM @
8 kHz sampling |
| 32 Kb/s |
G.726 @ 8 kHz
sampling |
| 48 Kb/s |
A-law PCM @
6 kHz sampling |
| 64 Kb/s |
A-law PCM @
8 kHz sampling |
| 48 Kb/s |
µ-law PCM @
6 kHz sampling |
| 64 Kb/s |
µ-law PCM @
8 kHz sampling |
| Digitization
selection |
Selectable
by application on function call-by-call basis |
| Playback speed
control |
Pitch controlled;
Available for 24 and 32 Kb/s data rates; Adjustment range:
±50%. Adjustable through application or programmable DTMF
control. |
| DTMF
TONE DETECTION: |
| DTMF digits |
0 to 9, *,
#, A, B, C, D per CCITT Q.23 |
| Dynamic range |
-36 dBm0 to
-3 dBm0 (T-1) or -39 dBm0 to 0 dBm0 (E-1) per tone, configurable
by parameter† |
| Minimum tone
duration |
40 ms, can
be increased with software configuration |
| Interdigit
timing |
Detects like
digits with a >40 ms interdigit delay. Detects different
digits with a 0 ms interdigit delay. |
| Acceptable
twist and frequency variation |
(T-1) Meets
Bellcore LSSGR Sec 6* and EIA 464 requirements(E-1) Meets
appropriate CCITT specifications† |
| Noise tolerance |
Meets Bellcore
LSSGR Sec 6 and EIA 464 requirements for Gaussian, impulse,
and power line noise tolerance |
| Cut-through |
(T-1) Local
echo cancellation permits 100% detection with a >4.5 dB
return loss line.(E-1) Digital trunks use separate transmit
and receive paths to network. Performance dependent on
far-end handset's match to local analog loop. |
| Talk off |
Detects less
than 20 digits while monitoring Bellcore TR-TSY-000763
standard speech tapes (LSSGR requirements specify detecting
no more than 470 total digits). Detects 0 digits while
monitoring MITEL speech tape #CM 7291. |
| GLOBAL
TONE DETECTION: |
| Tone type |
Programmable
for single or dual |
| Max. number
of tones |
Application-dependent |
| Frequency
range |
Programmable
within 300 to 3500 Hz |
| Max. frequency
deviation |
Programmable
in 5 Hz increments |
| Frequency
resolution |
±5 Hz. Separation
of dual frequency tones is limited to 62.5 Hz at a signal-to-noise
ratio of 20 dB. |
| Timing |
Programmable
cadence qualifier, in 10 ms increments |
| Dynamic range |
(T-1) Programmable,
default set at -36 dBm0 to -0 dBm0 (single tone), -3 dBm0
(dual tone)(E-1) Programmable, default set at -39 dBm0
to +0 dBm0 per tone |
| GLOBAL
TONE GENERATION: |
| Tone type |
Generate single
or dual tones |
| Frequency
range |
Programmable
within 200 to 4000 Hz |
| Frequency
resolution |
1 Hz |
| Duration |
10 ms increments |
| Amplitude |
(T-1) -43 dBm0
to -3 dBm0 per tone nominal, programmable(E-1) -40 dBm0
to +0 dBm0 per tone nominal, programmable |
| MF
SIGNALING (T-1): R1 |
| MF digits |
0 to 9, KP,
ST, ST1, ST2, ST3 per Bellcore LSSGR Sec 6, TR-NWT-000506
and CCITT Q.321 |
| Transmit level |
Complies with
Bellcore LSSGR Sec 6, TR-NWT-000506 |
| Signaling
mechanism |
Complies with
Bellcore LSSGR Sec 6, TR-NWT-000506 |
| Dynamic range
for detection |
-25 dBm0 to
-3 dBm0 per tone |
| Acceptable
twist |
6 dB |
| Acceptable
freq. variation |
Less than ±1
Hz |
| MF
SIGNALING (E-1): R2 |
| MF digits |
All 15 forward
and backward signal tones per CCITT Q.441 |
| Transmit level |
-8 dBm0 per
tone, nominal, per CCITT Q.454; programmable |
| Signaling
mechanism |
Supports the
R2 compelled signaling cycle and non-compelled pulse requirements
per CCITT Q.457 and Q.442 |
| Dynamic range
for detection |
-35 dBm0 to
-5 dBm0 per tone |
| Acceptable
twist |
6 dB |
| Acceptable
freq. variation |
Less than ±1
Hz |
| CALL
PROGRESS ANALYSIS: |
| Busy tone
detection |
Default setting
designed to detect 74 out of 76 unique busy/congestion
tones used in 97 countries as specified by CCITT Rec,
E., Suppl, #2. Default utilizes both frequency and cadence
detection. Application can select frequency only for faster
detection in specific environments. |
| Ring back
detection |
Default setting
designed to detect 83 out of 87 unique ring back tones
used in 96 countries as specified by CCITT Rec, E., Suppl,
#2. Utilizes both frequency and cadence detection. |
| Positive Voice
Detection accuracy |
>99% based
on tests on a database of real world calls in North America.
Performance in other markets may vary. |
| Positive Voice
Detection speed |
Detects voice
in as little as 1/10th of a second. |
| Positive Answering
Machine Detection accuracy |
85% based on
tests on a database of real world calls in North America.
Performance in other markets may vary. |
| Fax/modem
detection |
Preprogrammed |
| Intercept
detection |
Detects entire
sequence of the North American tri-tone.Other intercept
tone sequences can be programmed. |
| Dial tone
detection before dialing |
Application
enable/disable; Supports up to three different user definable
dial tones; Programmable dial tone drop out debouncing. |
| TONE
DIALING: |
| DTMF digits |
0 to 9, *,
#, A, B, C, D per Bellcore LSSGR Sec 6TR-NWT-000506 |
| Frequency
variation |
Less than ±
1 Hz |
| Rate |
10 digits/s,
configurable by parameter™ |
| Level |
-4.0 dBm0 per
tone, nominal, configurable by parameter™ |
| PULSE
DIALING: |
| 10 digits |
0 to 9 |
| Pulsing rate |
10 pulses/s,
nominal, configurable by parameter™ |
| Break ratio |
60% nominal,
configurable by parameter™ |
| ANALOG
DISPLAY SERVICES INTERFACE (ADSI): |
| |
FSK generation
per Bellcore TR-NWT-000030. |
| |
CAS tone generation
and DTMF detection per Bellcore TR-NWT-001273 |
**All specifications are subject
to change without notice.
™Configurable to meet country-specific PTT requirements.
Actual specification may vary from country to country for
approved products.
Hardware System Requirements
D/240JCT-T1 and D/300JCT-E1
- Intel386, Intel486, or Pentium microprocessor PCI bus
or mixed PCI/ISA bus computer
- Operating system hardware requirements vary according
to the number of channels being used
- System must comply with PCISIG Bus Specification Rev.
2.1 or later
Additional Components
D/240JCT-T1 and D/300JCT-E1
- Multidrop CT Bus cables
- CT Bus/SCbus adapter
- SCbus terminator kits
*Other names and brands may be claimed as the property of others.
Intel, CT Media, Dialogic, Intel384, Intel486, and Pentium are
trademarks or registered trademarks of Intel Corporation or
its subsidiaries in the United States and other countries.
|
